DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 471

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

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Figure 12.16 Sample Multiprocessor Serial Data Reception Flowchart (1)
Read ORER and FER flags in SSR
Read ORER and FER flags in SSR
Read receive data in RDR
Read receive data in RDR
Read RDRF flag in SSR
Read RDRF flag in SSR
Clear RE bit in SCR to 0
Read MPIE bit in SCR
All data received?
This station’s ID?
FER ∨ ORER = 1
FER∨ORER = 1
Start reception
Initialization
RDRF = 1
RDRF = 1
<End>
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Yes
No
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No
Yes
Error processing
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Rev.7.00 Dec. 24, 2008 Page 417 of 698
SCI initialization:
The RxD pin is automatically designated as
the receive data input pin.
ID reception cycle:
Set the MPIE bit in SCR to 1.
SCI status check, ID reception and
comparison:
Read SSR and check that the RDRF flag is
set to 1, then read the receive data in RDR
and compare it with this station’s ID.
If the data is not this station’s ID, set the MPIE
bit to 1 again, and clear the RDRF flag to 0.
If the data is this station’s ID, clear the RDRF
flag to 0.
SCI status check and data reception:
Read SSR and check that the RDRF flag is
set to 1, then read the data in RDR.
Receive error processing and break detection:
If a receive error occurs, read the ORER and
FER flags in SSR to identify the error. After
performing the appropriate error processing,
ensure that the ORER and FER flags are all
cleared to 0.
Reception cannot be resumed if either of
these flags is set to 1.
In the case of a framing error, a break can be
detected by reading the RxD pin value.
REJ09B0074-0700