DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 242

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Figure 7.9 shows an example of the setting procedure for normal mode.
Rev.7.00 Dec. 24, 2008 Page 188 of 698
REJ09B0074-0700
Set number of transfers
and transfer destination
Figure 7.9 Example of Normal Mode Setting Procedure
Set transfer source
Read DMABCRL
Set DMABCRH
Set DMABCRL
Normal mode
Normal mode
Set DMACR
addresses
setting
[1]
[2]
[3]
[4]
[5]
[6]
[1] Set each bit in DMABCRH.
[2] Set the transfer source address in MARA, and
[3] Set the number of transfers in ETCRA.
[4] Set each bit in DMACRA and DMACRB.
[5] Read the DTE = 0 and DTME = 0 in
[6] Set each bit in DMABCRL.
the transfer destination address in MARB.
DMABCRL.
· Set the FAE bit to 1 to select full address
· Specify enabling or disabling of internal
· Set the transfer data size with the DTSZ bit.
· Specify whether MARA is to be
· Clear the BLKE bit to 0 to select normal
· Specify whether MARB is to be
· Select the activation source with bits DTF3
· Specify enabling or desabling of transfer
· Set both the DTME bit and the DTE bit to 1
mode.
interrupt clearing with the DTA bit.
incremented, decremented, or fixed, with
the SAID and SAIDE bits.
mode.
incremented, decremented, or fixed, with
the DAID and DAIDE bits.
to DTF0.
end interrupts with the DTIE bit.
to enable transfer.

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