DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 34

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
20.3 Sleep Mode........................................................................................................................ 618
20.4 Software Standby Mode .................................................................................................... 619
20.5 Hardware Standby Mode................................................................................................... 621
20.6 Module Stop Mode ............................................................................................................ 623
20.7 Watch Mode ...................................................................................................................... 624
20.8 Subsleep Mode .................................................................................................................. 625
20.9 Subactive Mode................................................................................................................. 626
20.10 Direct Transitions .............................................................................................................. 627
20.11 φ Clock Output Disabling Function................................................................................... 627
20.12 Usage Notes....................................................................................................................... 628
Section 21 List of Registers
21.1 Register Addresses (Address Order) ................................................................................. 632
21.2 Register Bits ...................................................................................................................... 640
21.3 Register States in Each Operating Mode ........................................................................... 649
Rev.7.00 Dec. 24, 2008 Page xxxiv of liv
REJ09B0074-0700
20.3.1 Transition to Sleep Mode ..................................................................................... 618
20.3.2 Exiting Sleep Mode .............................................................................................. 618
20.4.1 Transition to Software Standby Mode.................................................................. 619
20.4.2 Clearing Software Standby Mode ........................................................................ 619
20.4.3 Setting Oscillation Stabilization Time after Clearing Software Standby Mode ... 620
20.4.4 Software Standby Mode Application Example .................................................... 620
20.5.1 Transition to Hardware Standby Mode ................................................................ 621
20.5.2 Clearing Hardware Standby Mode ....................................................................... 621
20.5.3 Hardware Standby Mode Timing ......................................................................... 622
20.5.4 Hardware Standby Mode Timings........................................................................ 622
20.7.1 Transition to Watch Mode.................................................................................... 624
20.7.2 Exiting Watch Mode ............................................................................................ 624
20.8.1 Transition to Sleep Mode ..................................................................................... 625
20.8.2 Exiting Subsleep Mode ........................................................................................ 625
20.9.1 Transition to Subactive Mode .............................................................................. 626
20.9.2 Exiting Subactive Mode ....................................................................................... 626
20.10.1 Direct Transitions from High-Speed Mode to Subactive Mode ........................... 627
20.10.2 Direct Transitions from Subactive Mode to High-Speed Mode ........................... 627
20.12.1 I/O Port Status ...................................................................................................... 628
20.12.2 Current Dissipation during Oscillation Stabilization Wait Period........................ 628
20.12.3 Flash Memory Module Stop................................................................................. 628
20.12.4 DMAC Module Stop ............................................................................................ 628
20.12.5 On-Chip Peripheral Module Interrupt .................................................................. 628
20.12.6 Entering Subactive/Watch Mode and DMAC and DTC Module Stop................. 629
20.12.7 Writing to MSTPCR............................................................................................. 629
.............................................................................................. 631

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