DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 465

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

Table 12.11 SSR Status Flags and Receive Data Handling
Note: * The RDRF flag retains the state it had before data reception.
RDRF*
1
0
0
1
1
0
1
No
No
ORER
1
0
0
1
1
0
1
SSR Status Flag
Read receive data in RDR, and
clear RDRF flag in SSR to 0
PER ∨ FER ∨ ORER = 1
Clear RE bit in SCR to 0
Read RDRF flag in SSR
Read ORER, PER, and
Figure 12.12 Sample Serial Data Reception Flowchart (1)
All data received?
FER flags in SSR
Start reception
Initialization
FER
RDRF = 1
0
1
0
1
0
1
1
<End>
Yes
Yes
No
PER
0
0
1
0
1
1
1
(Continued on next page)
Error processing
Yes
[1]
[2]
[4]
Receive Data
Lost
Transferred to RDR
Transferred to RDR
Lost
Lost
Transferred to RDR
Lost
[5]
[3]
[1]
[2]
[4]
[5]
Rev.7.00 Dec. 24, 2008 Page 411 of 698
SCI initialization:
The RxD pin is automatically designated as
the receive data input pin.
[3] Receive error processing and break
detection:
If a receive error occurs, read the ORER,
PER, and FER flags in SSR to identify the
error. After performing the appropriate error
processing, ensure that the ORER, PER, and
FER flags are all cleared to 0. Reception
cannot be resumed if any of these flags are
set to 1. In the case of a framing error, a
break can be detected by reading the value
of the input port corresponding to the RxD
pin.
SCI status check and receive data read:
Read SSR and check that RDRF = 1, then
read the receive data in RDR and clear the
RDRF flag to 0. Transition of the RDRF flag
from 0 to 1 can also be identified by an RXI
interrupt.
Serial reception continuation procedure:
To continue serial reception, before the end
bit for the current frame is received, reading
the RDRF flag and RDR, and clearing the
RDRF flag to 0 should be finished. The
RDRF flag is cleared automatically when
DMAC is activated by a reception complete
interrupt (RXI) and the RDR value is read.
Receive Error Type
Overrun error
Framing error
Parity error
Overrun error + framing error
Overrun error + parity error
Framing error + parity error
Overrun error + framing error +
parity error
REJ09B0074-0700