DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 355

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

9.5
9.5.1
Each channel has a TCNT and TGR. TCNT performs up-counting, and is also capable of free-
running operation, synchronous counting, and external event counting. Each TGR can be used as
an input capture register or output compare register.
Counter Operation: When one of bits CST0 to CST2 is set to 1 in TSTR, the TCNT counter for
the corresponding channel starts counting. TCNT can operate as a free-running counter, periodic
counter, and so on.
1. Example of count operation setting procedure
Figure 9.6 shows an example of the count operation setting procedure.
Operation
Basic Functions
Select output compare register
Select counter clearing source
Start count operation
Select counter clock
Figure 9.6 Example of Counter Operation Setting Procedure
Operation selection
<Periodic counter>
Periodic counter
Set period
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count operation
Rev.7.00 Dec. 24, 2008 Page 301 of 698
[1]
[2]
[3]
[4]
[5]
Select the counter
clock with bits
TPSC2 to TPSC0 in
TCR. At the same
time, select the
input clock edge
with bits CKEG1
and CKEG0 in TCR.
For periodic counter
operation, select the
TGR to be used as
the TCNT clearing
source with bits
CCLR2 to CCLR0 in
TCR.
Designate the TGR
selected in [2] as an
output compare
register by means of
TIOR.
Set the periodic
counter cycle in the
TGR selected in [2].
Set the CST bit in
TSTR to 1 to start
the counter
operation.
REJ09B0074-0700