DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 252

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Full Address Mode (Cycle Steal Mode): Figure 7.16 shows a transfer example in which TEND*
output is enabled and word-size full address mode transfer (cycle steal mode) is performed from
external 16-bit, 2-state access space to external 16-bit, 2-state access space.
A one-byte or one-word transfer is performed, and after the transfer the bus is released. While the
bus is released one bus cycle is inserted by the CPU.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
Note: * This LSI does not support TEND output.
Rev.7.00 Dec. 24, 2008 Page 198 of 698
REJ09B0074-0700
Address bus
TEND*
Note: * This LSI does not support TEND output.
HWR
LWR
RD
φ
Bus release
Figure 7.16 Example of Full Address Mode (Cycle Steal) Transfer
DMA read
DMA write
Bus release
DMA read DMA write
Bus release
DMA read DMA write
Last transfer cycle
DMA
dead
Bus release

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