DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 341

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Table 9.11 TIORL_0 (channel 0)
Legend:
×: Don’t care
Note: * When the BFB bit in TMDR_0 is set to 1 and TGRD_0 is used as a buffer register, this
Bit 7
IOD3
0
1
setting is invalid and input capture/output compare is not generated.
IOD2
Bit 6
0
1
0
1
Bit 5
IOD1
0
1
0
1
0
1
×
Bit 4
IOD0
0
1
0
1
0
1
0
1
0
1
×
×
TGRD_0
Function
Output
Compare
register*
register*
Input capture
Rev.7.00 Dec. 24, 2008 Page 287 of 698
TIOCD0 Pin Function
Output disabled
Initial output is 0 output
0 output at compare match
Initial output is 0 output
1 output at compare match
Initial output is 0 output
Toggle output at compare match
Output disabled
Initial output is 1 output
0 output at compare match
Initial output is 1 output
Initial output is 1 output
Toggle output at compare match
Capture input source is TIOCD0 pin
Input capture at rising edge
Capture input source is TIOCD0 pin
Input capture at falling edge
Capture input source is TIOCD0 pin
Input capture at both edges
Setting prohibited
Description
REJ09B0074-0700

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