DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 126

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
3.2
The following registers are related to the operating mode.
• Mode control register (MDCR)
• System control register (SYSCR)
3.2.1
MDCR is used to monitor the current operating mode of this LSI. MDCR should not be modified.
Notes: 1. Determined by the FWE and MD2 to MD0 pin settings.
3.2.2
SYSCR is used to select the interrupt control mode and the detected edge for NMI, select the
MRES input pin* enable or disable, and enables or disables on-chip RAM.
Rev.7.00 Dec. 24, 2008 Page 72 of 698
REJ09B0074-0700
Bit
7 to 4
3
2
1
0
2. Supported only by the H8S/2218 Group.
Bit Name
FWE
MDS2
MDS1
MDS0
Mode Control Register (MDCR)
System Control Register (SYSCR)
Register Descriptions
Initial Value R/W
Undefined
⎯*
⎯*
⎯*
⎯*
1
1
1
1
R
R
R
R
Description
Reserved
These bits are always read as undefined value and
cannot be modified.
Flash Programming Enable
Reflects the input level at the FWE pin. This bit
functions same as the FWE bit in the FLMCR1
register.
Mode Select 2 to 0
These bits indicate the input levels at pins MD2 to
MD0 (the current operating mode). Bits MDS2 to
MDS0 correspond to MD2 to MD0. MDS2 to MDS0
are read-only bits and they cannot be written to. The
mode pin (MD2 to MD0) input levels are latched into
these bits when MDCR is read.
These latches are canceled by a power-on reset, but
maintained at manual reset*
2
.

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