DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 492
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DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
(756 pages)
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12.8
The SCI_0 supports the SCI select function which allows clock synchronous communication
between master LSI and one of multiple slave LSI. Figure 12.36 shows an example of
communication using the SCI select function. Figure 12.37 shows the operation.
The master LSI can communicate with slave LSI_A by bringing SEL_A and SEL_B signals low
and high, respectively. In this case, the TxD0_B pin of the slave LSI_B is brought high-
impedance state and the internal SCK0_A signal is fixed high. This halts the communication
operation of slave LSI_B. The master LSI can communicate with slave LSI_B by bringing the
SEL_A and SEL_B signals high and low, respectively.
The slave LSI detects the selection by receiving the low level input from the IRQ7 pin and
immediately executes data transmission/reception processing.
Note: The selection signals (SEL_A and SEL_B) of the LSI must be switched while the serial
Rev.7.00 Dec. 24, 2008 Page 438 of 698
REJ09B0074-0700
clock (M_SCK) is high after the end bit of the transmit data has been send. Note that one
selection signal can be brought low at the same time.
SCI Select Function (Clocked Synchronous Mode)
Figure 12.36 Example of Communication Using the SCI Select Function
Master LSI
M_SCK
M_RxD
M_TxD
SEL_A
SEL_B
IRQ7_A
RxD0_A
TxD0_A
IRQ7_B
RxD0_B
TxD0_B
SCK0
SCK0
Slave LSI_B (This LSI)
Slave LSI_A (This LSI)
C/A = CKE1 = SSE = 1
SCK0_B
SCK0_A
RSR0_A
controller
Transmission/
Interrupt
reception
TSR0_A
control
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