DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 338

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

9.3.3
The TIOR registers control the TGR registers. The TPU has eight TIOR registers, two each for
channels 0, and one each for channels 1 and 2. Care is required since TIOR is affected by the
TMDR setting. The initial output specified by TIOR is valid when the counter is stopped (the CST
bit in TSTR is cleared to 0). Note also that, in PWM mode 2, the output at the point at which the
counter is cleared to 0 is specified. When TGRC or TGRD is designated for buffer operation, this
setting is invalid and the register operates as a buffer register.
• TIORH_0, TIOR_1, TIOR_2
• TIORL_0
Rev.7.00 Dec. 24, 2008 Page 284 of 698
REJ09B0074-0700
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name Initial value
IOB3
IOB2
IOB1
IOB0
IOA3
IOA2
IOA1
IOA0
Bit Name Initial value
IOD3
IOD2
IOD1
IOD0
IOC3
IOC2
IOC1
IOC0
Timer I/O Control Register (TIOR)
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
I/O Control B3 to B0
Specify the function of TGRB.
I/O Control A3 to A0
Specify the function of TGRA.
Description
I/O Control D3 to D0
Specify the function of TGRD.
I/O Control C3 to C0
Specify the function of TGRC.