DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 181

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
6.4
6.4.1
In advanced mode, the bus controller partitions the 16 Mbytes address space into eight areas, 0 to
7, in 2-Mbyte units, and performs bus control for external space in area units. In normal mode*, it
controls a 64-kbyte address space comprising part of area 0.
Figure 6.2 shows an outline of the memory map.
Chip select signals (CS0 to CS5) can be output for areas 0 to 5.
Note: * Not available in this LSI.
Bus Control
Area Divisions
Notes: 1. Not available in this LSI.
Figure 6.2 Overview of Area Divisions
H'000000
H'1FFFFF
H'200000
H'3FFFFF
H'400000
H'5FFFFF
H'600000
H'7FFFFF
H'800000
H'9FFFFF
H'A00000
H'BFFFFF
H'C00000
H'DFFFFF
H'E00000
H'FFFFFF
2. This area is allocated to the on-chip USB in this LSI.
(1)
Advanced mode
(2 Mbytes)
(2 Mbytes)
(2 Mbytes)
(2 Mbytes)
(2 Mbytes)
(2 Mbytes)
(2 Mbytes)
(2 Mbytes)
Area 0
Area 1
Area 2
Area 3
Area 4
Area 5
Area 6
Area 7
*
2
Rev.7.00 Dec. 24, 2008 Page 127 of 698
H'0000
H'FFFF
(2)
Normal mode*
1
REJ09B0074-0700

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