DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 364

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DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
Example of Buffer Operation Setting Procedure: Figure 9.18 shows an example of the buffer
operation setting procedure.
Rev.7.00 Dec. 24, 2008 Page 310 of 698
REJ09B0074-0700
Figure 9.18 Example of Buffer Operation Setting Procedure
Select TGR function
Set buffer operation
<Buffer operation>
Buffer operation
Start count
[1]
[2]
[3]
[1]
[2]
[3]
Designate TGR as an input capture register or
output compare register by means of TIOR.
Designate TGR for buffer operation with bits
BFA and BFB in TMDR.
Set the CST bit in TSTR to 1 start the count
operation.

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