DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 37

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

Section 1 Overview
Figure 1.1
Figure 1.2
Figure 1.3
Figure 1.4
Figure 1.5
Figure 1.6
Figure 1.7
Figure 1.8
Figure 1.9
Figure 1.10 Pin Arrangements of HD6432211, HD6432210 and HD6432210S
Figure 1.11 Pin Arrangements of HD64F2212, HD64F2212U, HD64F2212CU, HD64F2211,
Figure 1.12 Pin Arrangements of HD6432211, HD6432210 and HD6432210S
Section 2 CPU
Figure 2.1
Figure 2.2
Figure 2.3
Figure 2.4
Figure 2.5
Figure 2.6
Figure 2.7
Figure 2.8
Figure 2.9
Figure 2.9
Figure 2.10 Memory Data Formats............................................................................................ 45
Figure 2.11 Instruction Formats (Examples) ............................................................................. 57
Figure 2.12 Branch Address Specification in Memory Indirect Mode ...................................... 61
Figure 2.13 State Transitions..................................................................................................... 65
Figure 2.14 Flowchart of Method for Accessing Registers Containing Write-Only Bits .......... 69
Internal Block Diagram of HD64F2218, HD64F2218U, HD64F2218CU and
HD642217CU.........................................................................................................
Internal Block Diagram of HD6432217 .................................................................
Internal Block Diagram of HD64F2212, HD64F2212U, HD64F2212CU,
HD64F2211, HD64F2211U, HD64F2211CU and HD64F2210CU.......................
Internal Block Diagram of HD6432211, HD6432210 and HD6432210S ..............
Pin Arrangements of HD64F2218, HD64F2218U, HD64F2218CU and
HD64F2217CU (TFP-100G, TFP-100GV)............................................................
Pin Arrangements of HD64F2218, HD64F2218U, HD64F2218CU and
HD64F2217CU (BP-112, BP-112V)......................................................................
Pin Arrangements of HD6432217 (TFP-100G, TFP-100GV)................................
Pin Arrangements of HD6432217 (BP-112, BP-112V) ......................................... 10
Pin Arrangements of HD64F2212, HD64F2212U, HD64F2212CU, HD64F2211,
HD64F2211U, HD64F2211CU and HD64F2210CU (FP-64E, FP-64EV)............ 11
(FP-64E, FP-64EV) ................................................................................................ 12
HD64F2211U, HD64F2211CU and HD64F2210CU (TNP-64B, TNP-64BV) ..... 13
(TNP-64B, TNP-64BV) ......................................................................................... 14
Exception Vector Table (Normal Mode)................................................................ 35
Stack Structure in Normal Mode............................................................................ 35
Exception Vector Table (Advanced Mode)............................................................ 36
Stack Structure in Advanced Mode ........................................................................ 37
Memory Map.......................................................................................................... 38
CPU Registers ........................................................................................................ 39
Usage of General Registers .................................................................................... 40
Stack....................................................................................................................... 41
General Register Data Formats (1)......................................................................... 44
General Register Data Formats (2)......................................................................... 44
Figures
Rev.7.00 Dec. 24, 2008 Page xxxvii of liv
REJ09B0074-0700
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