DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 154

no-image

DF2211NP24V

Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
The set timing for IRQnF is shown in figure 5.3.
The detection of IRQn interrupts does not depend on whether the relevant pin has been set for
input or output. However, when a pin is used as an external interrupt input pin, do not clear the
corresponding DDR to 0; and use the pin as an I/O pin for another function. IRQnF interrupt
request flag is set when the setting condition is satisfied, regardless of IER settings. Accordingly,
refer to only necessary flags.
5.4.2
The sources for internal interrupts from on—chip peripheral modules have the following features:
• For each on—chip peripheral module there are flags that indicate the interrupt request status,
• The interrupt priority level can be set by means of IPR.
• The DMAC can be activated by a TPU, SCI, or other interrupt request.
• When the DMAC is activated by an interrupt request, it is not affected by the interrupt control
Rev.7.00 Dec. 24, 2008 Page 100 of 698
REJ09B0074-0700
and enable bits that select enabling or disabling of these interrupts. If both of these are set to 1
for a particular interrupt source, an interrupt request is issued to the interrupt controller.
mode or CPU interrupt mask bit.
IRQn
input pin
IRQnF
Internal Interrupts
Note: n = 7 to 0
Figure 5.3 Timing of Setting IRQnF

Related parts for DF2211NP24V