DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 441
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DF2211NP24V
Manufacturer Part Number
DF2211NP24V
Description
H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
Manufacturer
Renesas Technology / Hitachi Semiconductor
Datasheet
1.DF2211NP24V.pdf
(756 pages)
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Bit
7
6 to
4
3
2
1
0
Bit Name Initial Value
ACS3
—
TIOCA2E 1
TIOCA1E 1
TIOCC0E 1
TIOCA0E 1
0
Undefined
R/W
R/W
—
R/W
R/W
R/W
R/W
Selects the clock source in asynchronous mode
depending on the combination with the ACS2 to ACS0
(bits 2 to 0 in SEMRA_0). For details, see section 12.3.9,
Serial Extended Mode Register A_0 (SEMRA_0).
Reserved
The write value should always be 0.
TIOCA2 Output Enable
Controls the TIOCA2 output on the P16 pin.
When the TIOCA2 in TPU is output to generate the
transfer clock, P16 is used as other function pin by
setting this bit to 0.
0: Disables output of TIOCA2 in TPU
1: Enables output of TIOCA2 in TPU
TIOCA1 Output Enable
Controls the TIOCA1 output on the P14 pin.
When the TIOCA1 in TPU is output to generate the
transfer clock, P14 is used as other function pin by
setting this bit to 0.
0: Disables output of TIOCA1 in TPU
1: Enables output TIOCA1 in TPU
Controls the TIOCC0 output on the P12 pin.
When the TIOCC0 in TPU is output to generate the
transfer clock, P12 is used as other function pin by
setting this bit to 0.
0: Disables output of TIOCC0 in TPU
1: Enables output of TIOCC0 in TPU
TIOCA0 Output Enable
Controls the TIOCA0 output on the P10 pin.
When the TIOCA0 in TPU is output to generate the
transfer clock, P10 is used as other function pin by
setting this bit to 0.
0: Disables output of TIOCA0 in TPU
1: Enables output of TIOCA0 in TPU
Description
Asynchronous Clock Source Select
TIOCC0 Output Enable
Rev.7.00 Dec. 24, 2008 Page 387 of 698
REJ09B0074-0700
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