DF2211NP24V Renesas Technology / Hitachi Semiconductor, DF2211NP24V Datasheet - Page 348

• Manufacturer Part Number: DF2211NP24V
• Description: H8S/2200 Series, 2212 Group, USB, RTC, HSS TNP-64B; Vcc= 2.7 to 3.6 volts, Temp= -20 to 75 C; Package: PVQN0064LB-A
• Manufacturer: Renesas Technology / Hitachi Semiconductor

9.3.5
The TSR registers indicate the status of each channel. The TPU has three TSR registers, one for
each channel.
Rev.7.00 Dec. 24, 2008 Page 294 of 698
REJ09B0074-0700
Bit
1
0
Bit
7
6
5
Bit Name Initial value
TGIEB
TGIEA
Bit Name Initial value
TCFD
–
TCFU
Timer Status Register (TSR)
0
0
1
1
0
R/W
R
–
R/(W)* Underflow Flag
R/W
R/W
R/W
Description
TGR Interrupt Enable B
Enables or disables interrupt requests (TGIB) by the
TGFB bit when the TGFB bit in TSR is set to 1.
0: Interrupt requests (TGIB) by TGFB disabled
1: Interrupt requests (TGIB) by TGFB enabled
TGR Interrupt Enable A
Enables or disables interrupt requests (TGIA) by the
TGFA bit when the TGFA bit in TSR is set to 1.
0: Interrupt requests (TGIA) by TGFA disabled
1: Interrupt requests (TGIA) by TGFA enabled
Description
Count Direction Flag
Status flag that shows the direction in which TCNT counts
in channel 1 and 2. In channel 0, bit 7 is reserved. It is
always read as 0 and cannot be modified.
0: TCNT counts down
1: TCNT counts up
Reserved
This bit is always read as 1 and cannot be modified.
Status flag that indicates that TCNT underflow has
occurred when channels 1 and 2 are set to phase
counting mode. The write value should always be 0 to
clear this flag. In channel 0, bit 5 is reserved.
[Setting condition]
[Clearing condition]
When the TCNT value underflows (change from H'0000
to H'FFFF)
When 0 is written to TCFU after reading TCFU = 1