H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 177

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 6 Bus Controller
6.3.2
Bus Specifications
The external space bus specifications consist of three elements: bus width, number of access
states, and number of program wait states.
The bus width and number of access states for on-chip memory and internal I/O registers are
fixed, and are not affected by the bus controller.
(1) Bus Width
A bus width of 8 or 16 bits can be selected with ADWCR. An area for which an 8-bit bus is
selected functions as an 8-bit access space, and an area for which a 16-bit bus is selected functions
as a16-bit access space.
If all areas are designated for 8-bit access, 8-bit bus mode is set; if any area is designated for 16-bit
access, 16-bit bus mode is set. When the burst ROM interface is designated, 16-bit bus mode is
always set.
(2) Number of Access States
Two or three access states can be selected with ASTCR. An area for which 2-state access is
selected functions as a 2-state access space, and an area for which 3-state access is selected
functions as a 3-state access space.
With the DRAM interface and burst ROM interface, the number of access states may be
determined without regard to ASTCR.
When 2-state access space is designated, wait insertion is disabled.
(3) Number of Program Wait States
When 3-state access space is designated by ASTCR, the number of program wait states to be
inserted automatically is selected with WCRH and WCRL. From 0 to 3 program wait states can be
selected.
Table 6.3 shows the bus specifications for each basic bus interface area.
Rev. 3.00 Sep 15, 2006 page 143 of 988
REJ09B0330-0300