H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 344

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 8 Data Transfer Controller (DTC)
8.3.6
In repeat mode, one operation transfers one byte or one word of data.
From 1 to 256 transfers can be specified. Once the specified number of transfers have ended, the
initial state of the transfer counter and the address register specified as the repeat area is restored,
and transfer is repeated. In repeat mode the transfer counter value does not reach H'00, and
therefore CPU interrupts cannot be requested when DISEL = 0.
Table 8.6 lists the register information in repeat mode and figure 8.7 shows memory mapping in
repeat mode.
Table 8.6
Name
DTC source address register
DTC destination address register
DTC transfer count register AH
DTC transfer count register AL
DTC transfer count register B
Rev. 3.00 Sep 15, 2006 page 310 of 988
REJ09B0330-0300
SAR or
DAR
Repeat Mode
Register Information in Repeat Mode
Repeat area
Figure 8.7 Memory Mapping in Repeat Mode
Abbreviation
SAR
CRAH
CRAL
CRB
DAR
Transfer
Designates transfer count (8 bits
Not used
Function
Designates source address
Designates destination address
Holds number of transfers
DAR or
SAR
2)

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