H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 946

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Appendix B Internal I/O Register
TCSR—Timer Control/Status Register
Rev. 3.00 Sep 15, 2006 page 912 of 988
REJ09B0330-0300
Bit
Initial value
Read/Write
The method for writing to TCSR is different from that for general registers to prevent accidental overwriting.
For details see section 12.2.4, Notes on Register Access.
Note: * Can only be written with 0 for flag clearing.
:
:
:
Overflow Flag
R/(W) *
OVF
0
1
7
0
[Clearing condition]
Cleared by reading TCSR when OVF = 1, then writing 0 to OVF
[Setting condition]
Set when TCNT overflows from H'FF to H'00 in interval timer mode
Timer Mode Select
WT/IT
R/W
0
1
6
0
Interval timer mode: Sends the CPU an interval timer interrupt request
(WOVI) when TCNT overflows
Watchdog timer mode: Generates the WDTOVF signal when
TCNT overflows
Timer Enable
TME
R/W
0
1
5
0
TCNT is initialized to H'00 and halted
TCNT counts
—
—
4
1
Note: *
CKS2 CKS1 CKS0
Clock Select
—
—
3
1
0
1
H'FFBC (W) H'FFBC (R)
0
1
0
1
The overflow period is the time from when TCNT
starts counting up from H'00 until overflow occurs.
CKS2
R/W
2
0
0
1
0
1
0
1
0
1
/2 (initial value)
/64
/128
/512
/2048
/8192
/32768
/131072
CKS1
R/W
Clock
1
0
CKS0
R/W
0
0
(when
25.6 µs
819.2 µs
1.6 ms
6.6 ms
26.2 ms
104.9 ms
419.4 ms
1.68 s
Overflow period*
= 20 MHz)
WDT