H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 411

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Port B Data Register (PBDR) [H8S/2351 Only]
PBDR is an 8-bit readable/writable register that stores output data for the port B pins (PB
PBDR is initialized to H'00 by a power-on reset, and in hardware standby mode. It retains its prior
state after a manual reset, and in software standby mode.
Port B Register (PORTB) [H8S/2351 Only]
PORTB is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port B pins (PB
If a port B read is performed while PBDDR bits are set to 1, the PBDR values are read. If a port B
read is performed while PBDDR bits are cleared to 0, the pin states are read.
After a power-on reset and in hardware standby mode, PORTB contents are determined by the pin
states, as PBDDR and PBDR are initialized. PORTB retains its prior state after a manual reset, and
in software standby mode.
Bit
Initial value
R/W
Note: * Determined by state of pins PB
Bit
Initial value
R/W
:
:
:
:
:
:
PB7DR
R/W
PB7
—*
7
0
R
7
PB6DR
R/W
PB6
—*
6
0
R
6
7
to PB
PB5DR
R/W
PB5
—*
5
0
R
5
7
0
) must always be performed on PBDR.
to PB
PB4DR
0
.
R/W
PB4
—*
4
0
R
4
Rev. 3.00 Sep 15, 2006 page 377 of 988
PB3DR
R/W
PB3
—*
3
0
R
3
PB2DR
R/W
PB2
—*
2
0
R
2
PB1DR
Section 9 I/O Ports
REJ09B0330-0300
R/W
PB1
—*
1
0
R
1
PB0DR
7
R/W
PB0
to PB
—*
0
0
R
0
0
).