H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 298

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
7.5.10
Short Address Mode
Figure 7.19 shows a transfer example in which TEND output is enabled and byte-size short
address mode transfer (sequential/idle/repeat mode) is performed from external 8-bit, 2-state
access space to internal I/O space.
A one-byte or one-word transfer is performed for one transfer request, and after the transfer the
bus is released. While the bus is released one or more bus cycles are inserted by the CPU or DTC.
In the transfer end cycle (the cycle in which the transfer counter reaches 0), a one-state DMA dead
cycle is inserted after the DMA write cycle.
In repeat mode, when TEND output is enabled, TEND output goes low in the transfer cycle in
which the transfer counter reaches 0.
Rev. 3.00 Sep 15, 2006 page 264 of 988
REJ09B0330-0300
Address bus
TEND
HWR
LWR
RD
DMAC Bus Cycles (Dual Address Mode)
Bus release
Figure 7.19 Example of Short Address Mode Transfer
DMA
read
DMA
write
Bus release
DMA
read
DMA
write
release
Bus
DMA
read
Last transfer
cycle
DMA
write
DMA
dead
Bus
release