H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 488

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 10 16-Bit Timer Pulse Unit (TPU)
10.4
10.4.1
Operation in each mode is outlined below.
Normal Operation
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, synchronous counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
Synchronous Operation
When synchronous operation is designated for a channel, TCNT for that channel performs
synchronous presetting. That is, when TCNT for a channel designated for synchronous operation
is rewritten, the TCNT counters for the other channels are also rewritten at the same time.
Synchronous clearing of the TCNT counters is also possible by setting the timer synchronization
bits in TSYR for channels designated for synchronous operation.
Buffer Operation
When TGR is an output compare register: When a compare match occurs, the value in the
buffer register for the relevant channel is transferred to TGR.
When TGR is an input capture register: When input capture occurs, the value in TCNT is
transfer to TGR and the value previously held in TGR is transferred to the buffer register.
Cascaded Operation
The channel 1 counter (TCNT1), channel 2 counter (TCNT2), channel 4 counter (TCNT4), and
channel 5 counter (TCNT5) can be connected together to operate as a 32-bit counter.
Rev. 3.00 Sep 15, 2006 page 454 of 988
REJ09B0330-0300
Operation
Overview