H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 313

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Figure 7.34 shows an example of single address transfer using the write data buffer function. In
this example, the CPU program area is in on-chip memory.
When the write data buffer function is activated, the DMAC recognizes that the bus cycle
concerned has ended, and starts the next operation. Therefore, DREQ pin sampling is started one
state after the start of the DMA write cycle or single address transfer.
7.5.13
The DMAC channel priority order is: channel 0 > channel 1, and channel A > channel B. Table
7.13 summarizes the priority order for DMAC channels.
Table 7.13 DMAC Channel Priority Order
Short Address Mode
Channel 0A
Channel 0B
Channel 1A
Channel 1B
Figure 7.34 Example of Single Address Transfer Using Write Data Buffer Function
Internal read signal
External address
Internal address
DMAC Multi-Channel Operation
DACK
RD
DMA
read
DMA
single
Full Address Mode
Channel 0
Channel 1
CPU
read
Rev. 3.00 Sep 15, 2006 page 279 of 988
Section 7 DMA Controller (DMAC)
DMA
single
Priority
High
Low
CPU
read
REJ09B0330-0300

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