H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 214

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 6 Bus Controller
Full access
Burst access
T
T
T
T
1
2
1
1
Only lower address changed
Address bus
CS0
AS
RD
Data bus
Read data
Read data Read data
Figure 6.30 (b) Example of Burst ROM Access Timing (When AST0 = BRSTS1 = 0)
6.7.3
Wait Control
As with the basic bus interface, either program wait insertion or pin wait insertion using the WAIT
pin can be used in the initial cycle (full access) of the burst ROM interface. See section 6.4.5, Wait
Control.
Wait states cannot be inserted in a burst cycle.
Rev. 3.00 Sep 15, 2006 page 180 of 988
REJ09B0330-0300

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