H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 262

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
7.4
7.4.1
The DMAC can activate the DTC with a transfer end interrupt, rewrite the channel on which the
transfer ended using a DTC chain transfer, and reactivate the DTC. DMAWER applies restrictions
so that specific bits of DMACR for the specific channel, and also DMATCR and DMABCR, can
be changed to prevent inadvertent rewriting of registers other than those for the channel
concerned. The restrictions applied by DMAWER are valid for the DTC.
Figure 7.2 shows the transfer areas for activating the DTC with a channel 0A transfer end
interrupt, and reactivating channel 0A. The address register and count register area is re-set by the
first DTC transfer, then the control register area is re-set by the second DTC chain transfer.
When re-setting the control register area, perform masking by setting bits in DMAWER to prevent
modification of the contents of the other channels.
Rev. 3.00 Sep 15, 2006 page 228 of 988
REJ09B0330-0300
Register Descriptions (3)
DMA Write Enable Register (DMAWER)
Figure 7.2 Areas for Register Re-Setting by DTC (Example: Channel 0A)
DTC
Second transfer area
using chain transfer
First transfer area
DMACR0A
DMACR1A
DMAWER
DMABCR
ETCR0A
ETCR0B
ETCR1A
ETCR1B
IOAR0A
IOAR0B
IOAR1A
IOAR1B
MAR0A
MAR0B
MAR1A
MAR1B
DMACR0B
DMACR1B
DMATCR