H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 549

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Bits 3 and 2—Group 1 Compare Match Select 1 and 0 (G1CMS1, G1CMS0): These bits
select the compare match that triggers pulse output group 1 (pins PO7 to PO4).
Bits 1 and 0—Group 0 Compare Match Select 1 and 0 (G0CMS1, G0CMS0): These bits
select the compare match that triggers pulse output group 0 (pins PO3 to PO0).
11.2.6
PMR is an 8-bit readable/writable register that selects pulse output inversion and non-overlapping
operation for each group.
The output trigger period of a non-overlapping operation PPG output waveform is set in TGRB
and the non-overlap margin is set in TGRA. The output values change at compare match A and B.
For details, see section 11.3.4, Non-Overlapping Pulse Output.
PMR is initialized to H'F0 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 3
G1CMS1
0
1
Bit 1
G0CMS1
0
1
Bit
Initial value
R/W
PPG Output Mode Register (PMR)
:
:
:
Bit 2
G1CMS0
0
1
0
1
Bit 0
G0CMS0
0
1
0
1
G3INV
R/W
7
1
G2INV
Description
Output Trigger for Pulse Output Group 1
Compare match in TPU channel 0
Compare match in TPU channel 1
Compare match in TPU channel 2
Compare match in TPU channel 3
Description
Output Trigger for Pulse Output Group 0
Compare match in TPU channel 0
Compare match in TPU channel 1
Compare match in TPU channel 2
Compare match in TPU channel 3
R/W
6
1
G1INV
R/W
5
1
Section 11 Programmable Pulse Generator (PPG)
G0INV
R/W
4
1
Rev. 3.00 Sep 15, 2006 page 515 of 988
G3NOV
R/W
3
0
G2NOV
R/W
2
0
G1NOV
R/W
REJ09B0330-0300
1
0
(Initial value)
(Initial value)
G0NOV
R/W
0
0