H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 288

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 7 DMA Controller (DMAC)
Rev. 3.00 Sep 15, 2006 page 254 of 988
REJ09B0330-0300
Address T
Address B
Notes:
Address
Address
Address
Address
Where :
T
T
B
B
L
L
N
M
A
A
A
B
A
B
A
B
Figure 7.13 Operation in Block Transfer Mode (BLKDIR = 0)
= L
= L
= L
= L
= Value set in MARA
= Value set in MARB
= Value set in ETCRB
= Value set in ETCRAH and ETCRAL
A
B
A
B
+ SAIDE
+ DAIDE
1st block
2nd block
Nth block
(–1)
(–1)
SAID
DAID
(2
(2
DTSZ
DTSZ
Consecutive transfer
of M bytes or words
is performed in
response to one
request
(M
(N–1))
Transfer
N–1))
Block area
Address T
Address B
B
B

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