H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 254

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
Bit 6—Destination Address Increment/Decrement (DAID)
Bit 5—Destination Address Increment/Decrement Enable (DAIDE): These bits specify
whether destination address register MARB is to be incremented, decremented, or left unchanged,
when data transfer is performed.
Bit 4—Reserved: Can be read or written to.
Bits 3 to 0—Data Transfer Factor (DTF3 to DTF0): These bits select the data transfer factor
(activation source). The factors that can be specified differ between normal mode and block
transfer mode.
Rev. 3.00 Sep 15, 2006 page 220 of 988
REJ09B0330-0300
Bit 6
DAID
0
1
Bit 3
DTF3
0
1
Normal Mode
Bit 2
DTF2
0
1
*
Bit 5
DAIDE
0
1
0
1
Bit 1
DTF1
0
1
0
1
*
Description
MARB is fixed
MARB is incremented after a data transfer
MARB is fixed
MARB is decremented after a data transfer
When DTSZ = 0, MARB is incremented by 1 after a transfer
When DTSZ = 1, MARB is incremented by 2 after a transfer
When DTSZ = 0, MARB is decremented by 1 after a transfer
When DTSZ = 1, MARB is decremented by 2 after a transfer
Bit 0
DTF0
0
1
0
1
*
0
1
*
Description
—
—
Activated by DREQ pin falling edge input
Activated by DREQ pin low-level input
—
Auto-request (cycle steal)
Auto-request (burst)
—
(Initial value)
(Initial value)
*: Don’t care