H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 264

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Section 7 DMA Controller (DMAC)
Bit 0—Write Enable 0A (WE0A): Enables or disables writes to all bits in DMACR0A, and bits
8, 4, and 0 in DMABCR.
Writes by the DTC to bits 15 to 12 (FAE and SAE) in DMABCR are invalid regardless of the
DMAWER settings. These bits should be changed, if necessary, by CPU processing.
In writes by the DTC to bits 7 to 4 (DTE) in DMABCR, 1 can be written without first reading 0.
To reactivate a channel set to full address mode, write 1 to both Write Enable A and Write Enable
B for the channel to be reactivated.
MAR, IOAR, and ETCR are always write-enabled regardless of the DMAWER settings. When
modifying these registers, the channel for which the modification is to be made should be halted.
Rev. 3.00 Sep 15, 2006 page 230 of 988
REJ09B0330-0300
Bit 0
WE0A
0
1
Description
Writes to all bits in DMACR0A, and bits 8, 4, and 0 in DMABCR are disabled
Writes to all bits in DMACR0A, and bits 8, 4, and 0 in DMABCR are enabled
(Initial value)

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