H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 199

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
6.5.7
When DRAM is accessed, RAS precharging time must be secured. With the H8S/2350 Group, one
T
setting the TPC bit in MCR to 1. Set the appropriate number of T
connected and the operating frequency of the H8S/2350 Group. Figure 6.16 shows the timing
when two T
When the TCP bit is set to 1, two T
p
state is always inserted when DRAM space is accessed. This can be changed to two T
Read
Write
Note: n = 2 to 5
Precharge State Control
(UWE, LWE)
(UWE, LWE)
p
CAS, LCAS
HWR, LWR
HWR, LWR
CSn (RAS)
states are inserted.
D
D
A
Figure 6.16 Timing with Two Precharge States (2-WE System)
15
23
15
to D
to D
to A
0
0
0
T
p1
p
states are also used for refresh cycles.
T
p2
Rev. 3.00 Sep 15, 2006 page 165 of 988
row
T
r
p
cycles according to the DRAM
T
column
c1
Section 6 Bus Controller
REJ09B0330-0300
T
c2
p
states by

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