H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 179

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 6 Bus Controller
6.3.4
Advanced Mode
The initial state of each area is basic bus interface, 3-state access space. The initial bus width is
selected according to the operating mode. The bus specifications described here cover basic items
only, and the sections on each memory interface (6.4, 6.5, and 6.7) should be referred to for
further details.
Area 0
Area 0 includes on-chip ROM * , and in ROM-disabled expansion mode, all of area 0 is external
space. In ROM-enabled expansion mode, the space excluding on-chip ROM * is external space.
When area 0 external space is accessed, the CS0 signal can be output.
Either basic bus interface or burst ROM interface can be selected for area 0.
Note: * Only applies to the H8S/2351.
Areas 1 and 6
In external expansion mode, all of areas 1 and 6 is external space.
When area 1 and 6 external space is accessed, the CS1 and CS6 pin signals respectively can be
output.
Only the basic bus interface can be used for areas 1 and 6.
Areas 2 to 5
In external expansion mode, all of areas 2 to 5 is external space.
When area 2 to 5 external space is accessed, signals CS2 to CS5 can be output.
Basic bus interface or DRAM interface can be selected for areas 2 to 5. With the DRAM interface,
signals CS2 to CS5 are used as RAS signals.
Rev. 3.00 Sep 15, 2006 page 145 of 988
REJ09B0330-0300