H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 271

no-image

H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Figure 7.3 illustrates operation in sequential mode.
The number of transfers is specified as 16 bits in ETCR. ETCR is decremented by 1 each time a
transfer is executed, and when its value reaches H'0000, the DTE bit is cleared and transfer ends.
If the DTIE bit is set to 1 at this time, an interrupt request is sent to the CPU or DTC.
The maximum number of transfers, when H'0000 is set in ETCR, is 65,536.
Transfer requests (activation sources) consist of A/D converter conversion end interrupts, external
requests, SCI transmission complete and reception complete interrupts, and TPU channel 0 to 5
compare match/input capture A interrupts. External requests can be set for channel B only.
Address T
Address B
Figure 7.3 Operation in Sequential Mode
Transfer
1 byte or word transfer performed in
response to 1 transfer request
Notes:
Address T = L
Address B = L + (–1)
Where : L = Value set in MAR
Rev. 3.00 Sep 15, 2006 page 237 of 988
N = Value set in ETCR
Section 7 DMA Controller (DMAC)
DTID
(2
DTSZ
(N–1))
REJ09B0330-0300
IOAR

Related parts for H8S-2350