H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 850
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 850 of 1025
- Download datasheet (6Mb)
Appendix B Internal I/O Register
MRB—DTC Mode Register B
SAR—DTC Source Address Register
DAR—DTC Destination Address Register
Rev. 3.00 Sep 15, 2006 page 816 of 988
REJ09B0330-0300
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
:
:
:
:
:
:
:
:
:
Unde-
Unde-
fined
fined
Undefined
23
23
—
—
CHNE
DTC Chain Transfer Enable
—
7
0
1
Unde-
Unde-
fined
fined
22
22
—
—
End of DTC data transfer
DTC chain transfer
Unde-
Unde-
fined
fined
Undefined
21
21
—
—
DISEL
DTC Interrupt Select
—
6
Unde-
Unde-
fined
fined
0
1
20
—
20
—
After a data transfer ends, the CPU interrupt is
disabled unless the transfer counter is 0
After a data transfer ends, the CPU interrupt is enabled
Unde-
Specifies transfer data destination address
Unde-
fined
Undefined
fined
19
19
—
—
Specifies transfer data source address
—
—
5
Undefined
—
—
4
- - -
- - -
- - -
- - -
- - -
- - -
- - -
- - -
H'F800–H'FBFF
H'F800–H'FBFF
H'F800–H'FBFF
Undefined
—
—
3
Reserved
Only 0 should be written to these bits
Undefined
—
—
2
Unde-
Unde-
fined
fined
—
—
4
4
Unde-
Undefined
Unde-
fined
fined
—
—
3
3
—
—
1
Unde-
Unde-
fined
fined
—
—
2
2
Undefined
Unde-
Unde-
fined
fined
—
—
1
1
—
—
0
Unde-
Unde-
fined
fined
—
—
0
0
DTC
DTC
DTC
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