H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 8

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Rev. 3.00 Sep 15, 2006 page viii of xxxiv
Item
6.8.1 Operation
Figure 6.35 (a)
Example of Idle Cycle
Operation in RAS Down
Mode (ICIS1 = 1)
6.10.4 Transition
Timing
Figure 6.37 Bus-
Released State
Transition Timing
7.5.11 DMAC Bus
Cycles (Single Address
Mode)
Figure 7.27 Example of
Single Address Mode
(Byte Read) Transfer
Figure 7.29 Example
of Single Address Mode
(Byte Write) Transfer
Page
185
190
272
274
Revision (See Manual for Details)
Figure 6.35 (a) amended
CAS, LCAS
Figure 6.37 amended
HWR, LWR
Figure 7.27 amended
Address bus
Figure 7.29 amended
HWR
LWR
Data bus
Address
EXTAL
BREQ
BACK
RAS
DACK
TEND
RD
RD
release
Bus
T
p
DRAM space read
DMA read
T
r
T
c1
release
[1]
Bus
Minimum
1 state
T
c2
DMA read
[2]
T
1
External read
rele
T
1
B
[3]
T
2
High impedance
T
3
Idle cycle
DRAM space read
T
c1
[4]
T
c1
[5]
T
c2

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