H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 322

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
Figure 7.42 shows an example in which a low level is not output at the TEND pin.
Activation by Falling Edge on DREQ
DREQ pin falling edge detection is performed in synchronization with DMAC internal operations.
The operation is as follows:
[1] Activation request wait state: Waits for detection of a low level on the DREQ pin, and
[2] Transfer wait state: Waits for DMAC data transfer to become possible, and switches to [3].
[3] Activation request disabled state: Waits for detection of a high level on the DREQ pin, and
After DMAC transfer is enabled, a transition is made to [1]. Thus, initial activation after transfer is
enabled is performed by detection of a low level.
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switches to [2].
switches to [1].
Internal write signal
Internal read signal
External address
Figure 7.42 Example in Which Low Level Is Not Output at TEND
Internal address
HWR, LWR
TEND
DREQ
DREQ
DREQ Pin
External write by CPU, etc.
Not output
DMA
read
DMA
write
TEND
TEND
TEND Pin