H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 949

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

TCR0—Timer Control Register 0
Bit
Initial value
Read/Write
:
:
:
CCLR2
R/W
7
0
Notes: 1. Synchronous operation setting is performed by setting the
Counter Clear
0
1
CCLR1
R/W
0
1
0
1
6
0
2. When TGRC or TGRD is used as a buffer register, TCNT is
0
1
0
1
0
1
0
1
SYNC bit in TSYR to 1.
not cleared because the buffer register setting has priority,
and compare match/input capture does not occur.
TCNT clearing disabled
TCNT cleared by TGRA compare match/input capture
TCNT cleared by TGRB compare match/input capture
TCNT cleared by counter clearing for another channel
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation *
TCNT clearing disabled
TCNT cleared by TGRC compare match/input capture *
TCNT cleared by TGRD compare match/input capture *
TCNT cleared by counter clearing for another channel
performing synchronous clearing/synchronous operation *
CCLR0
R/W
5
0
CKEG1
R/W
4
0
Clock Edge
0
1
—
CKEG0
0
1
R/W
3
0
Time Prescaler
Count at rising edge
Count at falling edge
Count at both edges
0
1
H'FFD0
Rev. 3.00 Sep 15, 2006 page 915 of 988
0
1
0
1
TPSC2
R/W
2
0
0
1
0
1
0
1
0
1
Internal clock: counts on /1
Internal clock: counts on /4
Internal clock: counts on /16
Internal clock: counts on /64
External clock: counts on TCLKA pin input
External clock: counts on TCLKB pin input
External clock: counts on TCLKC pin input
External clock: counts on TCLKD pin input
Appendix B Internal I/O Register
TPSC1
R/W
1
0
1
2
2
1
TPSC0
R/W
0
0
REJ09B0330-0300
TPU0