H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 557

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Example of Normal Pulse Output (Example of Five-Phase Pulse Output)
Figure 11.5 shows an example in which pulse output is used for cyclic five-phase pulse output.
[1] Set up the TPU channel to be used as the output trigger channel so that TGRA is an output
[2] Write H'F8 in P1DDR and NDERH, and set the G3CMS1, G3CMS0, G2CMS1, and G2CMS0
[3] The timer counter in the TPU channel starts. When compare match A occurs, the NDRH
[4] Five-phase overlapping pulse output (one or two phases active at a time) can be obtained
TGRA
H'0000
NDRH
PODRH
PO15
PO14
PO13
PO11
TCNT value
PO12
compare register and the counter will be cleared by compare match A. Set the trigger period in
TGRA and set the TGIEA bit in TIER to 1 to enable the compare match A (TGIA) interrupt.
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Write output data H'80 in NDRH.
contents are transferred to PODRH and output. The TGIA interrupt handling routine writes the
next output data (H'C0) in NDRH.
subsequently by writing H'40, H'60, H'20, H'30. H'10, H'18, H'08, H'88... at successive TGIA
interrupts. If the DTC or DMAC is set for activation by this interrupt, pulse output can be
obtained without imposing a load on the CPU.
Figure 11.5 Normal Pulse Output Example (Five-Phase Pulse Output)
00
80
TCNT
80
C0
C0
40
40
60
Compare match
60
20
20
30
Section 11 Programmable Pulse Generator (PPG)
30
10
10
Rev. 3.00 Sep 15, 2006 page 523 of 988
18
18
08
08
88
88
80
80
REJ09B0330-0300
C0
C0
40
Time

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