H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 263

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
DMAWER is an 8-bit readable/writable register that controls enabling or disabling of writes to the
DMACR, DMABCR, and DMATCR by the DTC.
DMAWER is initialized to H'00 by a reset, and in standby mode.
Bits 7 to 4—Reserved: Read-only bits, always read as 0.
Bit 3—Write Enable 1B (WE1B): Enables or disables writes to all bits in DMACR1B, bits 11, 7,
and 3 in DMABCR, and bit 5 in DMATCR by the DTC.
Bit 2—Write Enable 1A (WE1A): Enables or disables writes to all bits in DMACR1A, and bits
10, 6, and 2 in DMABCR by the DTC.
Bit 1—Write Enable 0B (WE0B): Enables or disables writes to all bits in DMACR0B, bits 9, 5,
and 1 in DMABCR, and bit 4 in DMATCR.
Bit 3
WE1B
0
1
Bit 2
WE1A
0
1
Bit 1
WE0B
0
1
DMAWER
Initial value
R/W
Bit
Description
Writes to all bits in DMACR1B, bits 11, 7, and 3 in DMABCR, and bit 5 in DMATCR
are disabled
Writes to all bits in DMACR1B, bits 11, 7, and 3 in DMABCR, and bit 5 in DMATCR
are enabled
Description
Writes to all bits in DMACR1A, and bits 10, 6, and 2 in DMABCR are disabled
Writes to all bits in DMACR1A, and bits 10, 6, and 2 in DMABCR are enabled
Description
Writes to all bits in DMACR0B, bits 9, 5, and 1 in DMABCR, and bit 4 in DMATCR
are disabled
Writes to all bits in DMACR0B, bits 9, 5, and 1 in DMABCR, and bit 4 in DMATCR
are enabled
:
:
:
:
7
0
6
0
5
0
4
0
Rev. 3.00 Sep 15, 2006 page 229 of 988
WE1B
R/W
3
0
Section 7 DMA Controller (DMAC)
WE1A
R/W
2
0
WE0B
REJ09B0330-0300
R/W
1
0
(Initial value)
(Initial value)
(Initial value)
WE0A
R/W
0
0

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