H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 27

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

10.3 Interface to Bus Master ..................................................................................................... 452
10.4 Operation........................................................................................................................... 454
10.5 Interrupts ........................................................................................................................... 482
10.6 Operation Timing .............................................................................................................. 486
10.7 Usage Notes ...................................................................................................................... 494
Section 11 Programmable Pulse Generator (PPG)
11.1 Overview........................................................................................................................... 505
11.2 Register Descriptions ........................................................................................................ 509
10.2.5 Timer Status Register (TSR) ................................................................................ 443
10.2.6 Timer Counter (TCNT)........................................................................................ 447
10.2.7 Timer General Register (TGR) ............................................................................ 448
10.2.8 Timer Start Register (TSTR)................................................................................ 449
10.2.9 Timer Synchro Register (TSYR).......................................................................... 450
10.2.10 Module Stop Control Register (MSTPCR) .......................................................... 451
10.3.1 16-Bit Registers ................................................................................................... 452
10.3.2 8-Bit Registers ..................................................................................................... 452
10.4.1 Overview.............................................................................................................. 454
10.4.2 Basic Functions .................................................................................................... 455
10.4.3 Synchronous Operation........................................................................................ 461
10.4.4 Buffer Operation .................................................................................................. 464
10.4.5 Cascaded Operation ............................................................................................. 468
10.4.6 PWM Modes ........................................................................................................ 470
10.4.7 Phase Counting Mode .......................................................................................... 475
10.5.1 Interrupt Sources and Priorities............................................................................ 482
10.5.2 DTC/DMAC Activation....................................................................................... 484
10.5.3 A/D Converter Activation .................................................................................... 485
10.6.1 Input/Output Timing ............................................................................................ 486
10.6.2 Interrupt Signal Timing........................................................................................ 490
11.1.1 Features................................................................................................................ 505
11.1.2 Block Diagram ..................................................................................................... 506
11.1.3 Pin Configuration................................................................................................. 507
11.1.4 Registers............................................................................................................... 508
11.2.1 Next Data Enable Registers H and L (NDERH, NDERL) ................................... 509
11.2.2 Output Data Registers H and L (PODRH, PODRL) ............................................ 510
11.2.3 Next Data Registers H and L (NDRH, NDRL) .................................................... 511
11.2.4 Notes on NDR Access.......................................................................................... 511
11.2.5 PPG Output Control Register (PCR).................................................................... 514
11.2.6 PPG Output Mode Register (PMR)...................................................................... 515
11.2.7 Port 1 Data Direction Register (P1DDR)............................................................. 518
11.2.8 Port 2 Data Direction Register (P2DDR)............................................................. 518
Rev. 3.00 Sep 15, 2006 page xxvii of xxxiv
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