H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 253

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Bit 13—Source Address Increment/Decrement Enable (SAIDE): These bits specify whether
source address register MARA is to be incremented, decremented, or left unchanged, when data
transfer is performed.
Bit 12—Block Direction (BLKDIR)
Bit 11—Block Enable (BLKE): These bits specify whether normal mode or block transfer mode
is to be used. If block transfer mode is specified, the BLKDIR bit specifies whether the source side
or the destination side is to be the block area.
For operation in normal mode and block transfer mode, see section 7.5, Operation.
Bits 10 to 7—Reserved: Can be read or written to.
Bit 14
SAID
0
1
Bit 12
BLKDIR
0
1
Bit 13
SAIDE
0
1
0
1
Bit 11
BLKE
0
1
0
1
Description
MARA is fixed
MARA is incremented after a data transfer
MARA is fixed
MARA is decremented after a data transfer
Description
Transfer in normal mode
Transfer in block transfer mode, destination side is block area
Transfer in normal mode
Transfer in block transfer mode, source side is block area
When DTSZ = 0, MARA is incremented by 1 after a transfer
When DTSZ = 1, MARA is incremented by 2 after a transfer
When DTSZ = 0, MARA is decremented by 1 after a transfer
When DTSZ = 1, MARA is decremented by 2 after a transfer
Rev. 3.00 Sep 15, 2006 page 219 of 988
Section 7 DMA Controller (DMAC)
REJ09B0330-0300
(Initial value)
(Initial value)