H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 619

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

In serial reception, the SCI operates as described below.
[1] The SCI monitors the transmission line, and if a 0 stop bit is detected, performs internal
[2] The received data is stored in RSR in LSB-to-MSB order.
[3] The parity bit and stop bit are received.
[4] If the RIE bit in SCR is set to 1 when the RDRF flag changes to 1, a receive data full interrupt
synchronization and starts reception.
After receiving these bits, the SCI carries out the following checks.
[a] Parity check:
[b] Stop bit check:
[c] Status check:
If all the above checks are passed, the RDRF flag is set to 1, and the receive data is stored in
RDR.
If a receive error * is detected in the error check, the operation is as shown in table 13.11.
Note: * Subsequent receive operations cannot be performed when a receive error has
(RXI) request is generated.
Also, if the RIE bit in SCR is set to 1 when the ORER, PER, or FER flag changes to 1, a
receive error interrupt (ERI) request is generated.
The SCI checks whether the number of 1 bits in the receive data agrees with the parity
(even or odd) set in the O/E bit in SMR.
The SCI checks whether the stop bit is 1.
If there are two stop bits, only the first is checked.
The SCI checks whether the RDRF flag is 0, indicating that the receive data can be
transferred from RSR to RDR.
occurred.
Also note that the RDRF flag is not set to 1 in reception, and so the error flags must
be cleared to 0.
Section 13 Serial Communication Interface (SCI)
Rev. 3.00 Sep 15, 2006 page 585 of 988
REJ09B0330-0300