H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 230

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 7 DMA Controller (DMAC)
7.1.2
A block diagram of the DMAC is shown in figure 7.1.
Rev. 3.00 Sep 15, 2006 page 196 of 988
REJ09B0330-0300
Legend:
DMAWER
DMATCR
DMABCR
DMACR
MAR
IOAR
ETCR
Internal interrupts
External pins
Interrupt signals
Module stop mode can be set
The initial setting enables DMAC registers to be accessed. DMAC operation is halted by
setting module stop mode
TGI0A
TGI1A
TGI2A
TGI3A
TGI4A
TGI5A
TXI0
RXI0
TXI1
RXI1
ADI
DREQ0
DREQ1
TEND0
TEND1
DACK0
DACK1
DEND0A
DEND0B
DEND1A
DEND1B
Block Diagram
: DMA write enable register
: DMA terminal control register
: DMA band control register (for all channels)
: DMA control register
: Memory address register
: I/O address register
: Executive transfer counter register
Data buffer
Control logic
Figure 7.1 Block Diagram of DMAC
DMABCR
DMAWER
DMATCR
DMACR0A
DMACR0B
DMACR1A
DMACR1B
Internal address bus
Internal data bus
Address buffer
Processor
MAR0A
MAR0B
MAR1A
MAR1B
ETCR0A
ETCR0B
ETCR1A
ETCR1B
IOAR0A
IOAR0B
IOAR1A
IOAR1B