H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 586

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Serial Communication Interface (SCI)
13.2.5
SMR is an 8-bit register used to set the SCI’s serial transfer format and select the baud rate
generator clock source.
SMR can be read or written to by the CPU at all times.
SMR is initialized to H'00 by a reset, and in standby mode or module stop mode.
Bit 7—Communication Mode (C/A A A A ): Selects asynchronous mode or clocked synchronous mode
as the SCI operating mode.
Bit 6—Character Length (CHR): Selects 7 or 8 bits as the data length in asynchronous mode. In
clocked synchronous mode, a fixed data length of 8 bits is used regardless of the CHR setting.
Note:
Bit 5—Parity Enable (PE): In asynchronous mode, selects whether or not parity bit addition is
performed in transmission, and parity bit checking in reception. In clocked synchronous mode and
with a multiprocessor format, parity bit addition and checking is not performed, regardless of the
PE bit setting.
Rev. 3.00 Sep 15, 2006 page 552 of 988
REJ09B0330-0300
Bit 7
C/A A A A
0
1
Bit 6
CHR
0
1
Bit
Initial value
R/W
* When 7-bit data is selected, the MSB (bit 7) of TDR is not transmitted, and it is not
Serial Mode Register (SMR)
possible to choose between LSB-first or MSB-first transfer.
Description
Asynchronous mode
Clocked synchronous mode
Description
8-bit data
7-bit data *
:
:
:
R/W
C/A
7
0
CHR
R/W
6
0
R/W
PE
5
0
R/W
O/E
4
0
STOP
R/W
3
0
R/W
MP
2
0
CKS1
R/W
1
0
(Initial value)
(Initial value)
CKS0
R/W
0
0