H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 333

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

8.2.7
The DTC enable registers comprise six 8-bit readable/writable registers, DTCERA to DTCERF,
with bits corresponding to the interrupt sources that can activate the DTC. These bits enable or
disable DTC service for the corresponding interrupt sources.
The DTC enable registers are initialized to H'00 by a reset and in hardware standby mode.
Bit n—DTC Activation Enable (DTCEn)
Note: n = 7 to 0
A DTCE bit can be set for each interrupt source that can activate the DTC. The correspondence
between interrupt sources and DTCE bits is shown in table 8.4, together with the vector number
generated for each interrupt controller.
For DTCE bit setting, use bit manipulation instructions such as BSET and BCLR. If all interrupts
are masked, multiple activation sources can be set at one time by writing data after executing a
dummy read on the relevant register.
Bit n
DTCEn
0
1
Bit
Initial value
R/W
DTC Enable Registers (DTCER)
Description
DTC activation by this interrupt is disabled
[Clearing conditions]
DTC activation by this interrupt is enabled
[Holding condition]
When the DISEL bit is 0 and the specified number of transfers have not ended
:
:
:
When the DISEL bit is 1 and the data transfer has ended
When the specified number of transfers have ended
DTCE7
R/W
7
0
DTCE6
R/W
6
0
DTCE5
R/W
5
0
DTCE4
R/W
4
0
Section 8 Data Transfer Controller (DTC)
Rev. 3.00 Sep 15, 2006 page 299 of 988
DTCE3
R/W
3
0
DTCE2
R/W
2
0
DTCE1
R/W
REJ09B0330-0300
1
0
(Initial value)
DTCE0
R/W
0
0