H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 78
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H8S-2350
Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.H8S-2350.pdf
(1025 pages)
- Current page: 78 of 1025
- Download datasheet (6Mb)
Section 2 CPU
Note:
Rev. 3.00 Sep 15, 2006 page 44 of 988
REJ09B0330-0300
Type
Arithmetic
operations
* Size refers to the operand size.
B: Byte
W: Word
L:
Longword
Instruction
DIVXS
CMP
NEG
EXTU
EXTS
TAS
Size *
B/W
B/W/L
B/W/L
W/L
W/L
B
Function
Rd ÷ Rs
Performs signed division on data in two general
registers: either 16 bits ÷ 8 bits
remainder or 32 bits ÷ 16 bits
bit remainder.
Rd – Rs, Rd – #IMM
Compares data in a general register with data in another
general register or with immediate data, and sets CCR
bits according to the result.
0 – Rd
Takes the two’s complement (arithmetic complement) of
data in a general register.
Rd (zero extension)
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by padding with zeros on the left.
Rd (sign extension)
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by extending the sign bit.
Tests memory contents, and sets the most significant bit
(bit 7) to 1.
@ERd – 0, 1
Rd
Rd
(<bit 7> of @Erd)
Rd
Rd
16-bit quotient and 16-
8-bit quotient and 8-bit
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