H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 723

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
20.2.2
SCKCR is an 8-bit readable/writable register that performs clock output control and medium-
speed mode control.
SCKCR is initialized to H'00 by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 7— Clock Output Disable (PSTOP): Controls output.
Bits 6—Reserved: This bit can be read or written to, but only 0 should be written.
Bits 5 to 3—Reserved: Read-only bits, always read as 0.
Bits 2 to 0—System Clock Select (SCK2 to SCK0): These bits select the clock for the bus
master.
Bit 7
PSTOP
0
1
Bit 2
SCK2
0
1
Bit
Initial value
R/W
System Clock Control Register (SCKCR)
Bit 1
SCK1
0
1
0
1
Normal
Operating Mode
Fixed high
output (initial value)
:
:
:
PSTOP
R/W
Bit 0
SCK0
0
1
0
1
0
1
7
0
R/W
Description
Bus master in high-speed mode
Medium-speed clock is /2
Medium-speed clock is /4
Medium-speed clock is /8
Medium-speed clock is /16
Medium-speed clock is /32
6
0
Sleep Mode
Fixed high
output
5
0
Description
4
0
Software
Standby Mode
Fixed high
Fixed high
Rev. 3.00 Sep 15, 2006 page 689 of 988
3
0
Section 20 Power-Down Modes
SCK2
R/W
2
0
Hardware
Standby Mode
High impedance
High impedance
SCK1
REJ09B0330-0300
R/W
1
0
(Initial value)
SCK0
R/W
0
0

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