H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 822

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
Appendix A Instruction Set
Figure A.1 shows timing waveforms for the address bus and the RD, HWR, and LWR signals
during execution of the above instruction with an 8-bit bus, using three-state access with no wait
states.
Rev. 3.00 Sep 15, 2006 page 788 of 988
REJ09B0330-0300
Address bus
RD
HWR, LWR
Figure A.1 Address Bus, RD
of instruction
Fetching
3rd byte
(8-Bit Bus, Three-State Access, No Wait States)
R:W 2nd
of instruction
Fetching
4th byte
RD
RD
RD, HWR
High level
operation
Internal
HWR
HWR
HWR, and LWR
jump address
instruction at
1nd byte of
Fetching
LWR
LWR Timing
LWR
R:W EA
jump address
instruction at
2nd byte of
Fetching

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