H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 501

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H8S-2350

Manufacturer Part Number
H8S-2350
Description
16-Bit Single-Chip Microcomputer
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
When TGR is an input capture register: Figure 10.20 shows an operation example in which
TGRA has been designated as an input capture register, and buffer operation has been designated
for TGRA and TGRC.
Counter clearing by TGRA input capture has been set for TCNT, and both rising and falling edges
have been selected as the TIOCA pin input capture input edge.
As buffer operation has been set, when the TCNT value is stored in TGRA upon occurrence of
input capture A, the value previously stored in TGRA is simultaneously transferred to TGRC.
H'0F07
H'09FB
H'0532
H'0000
TIOCA
TGRA
TGRC
TCNT value
Figure 10.20 Example of Buffer Operation (2)
H'0532
Section 10 16-Bit Timer Pulse Unit (TPU)
Rev. 3.00 Sep 15, 2006 page 467 of 988
H'0F07
H'0532
REJ09B0330-0300
H'09FB
H'0F07
Time

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