H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 338

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 8 Data Transfer Controller (DTC)
8.3.2
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. An interrupt becomes a DTC activation source when the corresponding bit is set to 1, and a
CPU interrupt source when the bit is cleared to 0.
At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. Table 8.3 shows activation source and
DTCER clearance. The activation source flag, in the case of RXI0, for example, is the RDRF flag
of SCI0.
Table 8.3
Activation Source
Software activation
Interrupt activation
Figure 8.3 shows a block diagram of activation source control. For details see section 5, Interrupt
Controller.
Rev. 3.00 Sep 15, 2006 page 304 of 988
REJ09B0330-0300
Activation Sources
Activation Source and DTCER Clearance
When the DISEL Bit Is 0 and
the Specified Number of
Transfers Have Not Ended
The SWDTE bit is cleared to 0
The corresponding DTCER bit
remains set to 1
The activation source flag is
cleared to 0
When the DISEL Bit Is 1, or when
the Specified Number of Transfers
Have Ended
The SWDTE bit remains set to 1
An interrupt is issued to the CPU
The corresponding DTCER bit is
cleared to 0
The activation source flag remains set
to 1
A request is issued to the CPU for the
activation source interrupt