H8S-2350 RENESAS [Renesas Technology Corp], H8S-2350 Datasheet - Page 210

• Manufacturer Part Number: H8S-2350
• Description: 16-Bit Single-Chip Microcomputer
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 6 Bus Controller
6.6
When burst mode is selected with the DRAM interface, the DACK output timing can be selected
with the DDS bit. When DRAM space is accessed in DMAC single address mode at the same
time, whether or not burst access is to be performed is selected.
6.6.1
Burst access is performed by determining the address only, irrespective of the bus master. The
DACK output goes low from the T
Figure 6.28 shows the DACK output timing for the DRAM interface when DDS = 1.
Rev. 3.00 Sep 15, 2006 page 176 of 988
REJ09B0330-0300
Figure 6.28 DACK
DMAC Single Address Mode and DRAM Interface
When DDS = 1
Read
Write
LCAS (LCAS)
DACK
DACK
DACK Output Timing when DDS = 1 (Example of DRAM Access)
CAS, (UCAS)
HWR, (WE)
HWR, (WE)
CSn (RAS)
D
D
A
15
15
23
DACK
to D
to D
to A
0
0
0
C1
state in the case of the DRAM interface.
T
p
Row
T
r
T
c1
Column
T
c2